000 00934nam a22002297a 4500
999 _c164890
_d164890
005 20190802123310.0
010 _aB-728344
020 _a9789353062019
_c669.00
035 _aB-728344
037 _bRK Books
082 _a621.395
100 _aMano,M. Morris
245 _aDigital design with an introduction to the verilog HDL, VHDL and systemverilog /
_cby M. Morris Mano [and] Michael D. Ciletti
250 _a6th ed
260 _aNoida
_bPearson
_c2019
270 _a15th Floor, Tower B, World Trade Tower, Plot No.1, Block -C, Sector-16
_bNoida (UP)
_e201301
300 _a765p.:
_c23cm(pbk)
_bill.
500 _aIt include appendix, answers to selected problems and index
700 _aCiletti, Michael D.
942 _2ddc
_cEN
_h621.395
_mMAN