| 000 | 00771nam a22002177a 4500 | ||
|---|---|---|---|
| 999 |
_c157589 _d157589 |
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| 005 | 20180920120240.0 | ||
| 010 | _aENG-124007 | ||
| 020 |
_a9789353062019 _c669.00 |
||
| 035 | _aEN-107539 | ||
| 037 | _bDBAD/PUB | ||
| 082 | _a621.395 | ||
| 100 | _aMano, M. Morris | ||
| 245 |
_aDigital Design: _cby M. Morris Mano [and] Michael D. Ciletti _bwith an introduction to the verilog HDL, VHDL, and systemverilog / |
||
| 250 | _a6th ed. | ||
| 260 |
_aNoida _bPearson _c2018 |
||
| 270 |
_a15th Floor, Tower B, Worls Trade Tower, Plot No.1, Block -C _bNoida (UP) _e201301 |
||
| 300 |
_a765p. _c25cm.(pbk) _bill. |
||
| 500 | _aIt include appendix, answers to selected problems and index | ||
| 700 | _aCiletti, Michael D. | ||
| 942 |
_2ddc _cEN _h621.395 _mMAN |
||