01390nam a22003137a 4500 ENG-90614 20060929121129.0 080729t xxu||||| |||| 00| 0 eng d ENG-90614 0070252211 395.00 EN-74147 DBAD / PUB DPL 621.392 Navabi, Zainalabedin. Verilog digital system design : RT level synthesis, testbench, and verification / by Zainalabedin Navabi. 2nd ed. New Delhi Tata McGraw-Hill Publishing 2008. xvi, 384 p. : ill. 24 cm. (pbk) 1 CD-ROM (4 3/4 in.) Includes bibliographical references and index. Verilog (Computer hardware description language) Electronic digital computers Computer-aided design. http://www.loc.gov/catdir/enhancements/fy0668/2006271457-b.html http://www.loc.gov/catdir/enhancements/fy0668/2006271457-d.html http://www.loc.gov/catdir/enhancements/fy0668/2006271457-t.html ddc EN 621.392 NAV 14630 14630 0 0 0 1 NFIC DBAD DBAD 2008-07-29 DBAD / PUB 395.00 0 621.392 NAV EN-74147 2008-09-15 00:00:00 1 395.00 2008-09-15 EN