Verilog digital system design : RT level synthesis, testbench, and verification / by Zainalabedin Navabi.

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TextPublication details: New Delhi Tata McGraw-Hill Publishing 2008.Edition: 2nd edDescription: xvi, 384 p. : ill. 24 cm. (pbk) 1 CD-ROM (4 3/4 in.)ISBN:

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Item type	Current library	Collection	Call number	Copy number	Status	Barcode
English Books	D.B.Act.Division	Non-fiction	621.392 NAV (Browse shelf(Opens below))	1	Not For Loan	EN-74147

Includes bibliographical references and index.

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